1. Field of the Invention
The present invention is related to a Pulse Interval to Voltage Converter (PIVC) and the conversion method thereof, more particularly, to a programmable PIVC and conversion method thereof.
2. Description of the Related Art
PIVCs are equipment commonly used in industry and biomedicine, which can express every pulse interval in the form of voltage. As shown in FIG. 1(a), T1 and T6 denote the intervals of each pulse 11, and after conversion, its voltage is directly proportional to the interval of each pulse 11. In other words, the greater an interval is, the greater the output voltage is. In addition, PIVCs are roughly divided into two types, namely analog and digital, depending on the design.
FIG. 1(b) illustrates the operation of a digital PIVC, that is, a counter 13 starts to run immediately after a pulse 11 is received, but on receipt of the next pulse 11, the counter 13 resets to zero and then runs again. Before resetting to zero, the counter 13 has to send the count to a latch 14. A digital-to-analog converter (DAC) 15 converts the count, which stands for a pulse interval, to a voltage signal.
Nevertheless, the aforesaid design has the following problems. First, low resolution of output voltage may occur. In the case of an output voltage displayed by 8 bits, a pulse interval is partitioned into a maximum of 256 levels, and the degree of the discrepancy between it and the next pulse interval is usually less than 10%. In other words, only about 26 levels out of 256 are useful in distinguishing a pulse interval from the next one. Hence, it does not make good use of the bits available, resulting in the low-resolution display of voltage. In view of this, resolution will not be increased, unless the counter, the latch and the digital-to-analog converter employ more bits. However, adding more bits will greatly increase the cost. Secondly, the PIVC may be susceptible to interference. Noise which appears in between two normal pulses may be deemed a pulse; in such circumstances the counter 13 resets to zero early, decreasing the count received by the latch 14 considerably. Referring to FIG. 1(c), if noise 16 occurs between two normal pulses 11, the count from the counter 13 sends to the latch 14 will greatly decrease, and thus the output voltage of a normal pulse 11 will be several times greater than the output voltage of the noise 16.
Since the conventional method has the aforementioned problems of low resolution and being susceptible to interference, it is necessary to improve the design.